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Figure
1
.
Schematic of hierarchical design
From
A Novel Dedicated Low Power 64 Bit Digital Comparator Using Cmos Logic
Shilparani Panda, Asirbad Behera, Manas Ranjan Jena, Snigdharani Nath
Journal of Embedded Systems
.
2014
, 2(2), 28-31 doi:10.12691/jes-2-2-2
Figure
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