Figure 2.3. Circuit generation of reversible 8 bit ripple carry adder with no input carry

From

Design of Digital Multiplier with Reversible Logic by Using the Ancient Indian Vedic Mathematics Suitable for Use in Hardware of Cryptosystems

Giridhari Muduli, Siddharth Kumar Dash, Bibhu Datta Pradhan, Manas Ranjan Jena

International Transaction of Electrical and Computer Engineers System. 2014, 2(4), 114-119 doi:10.12691/iteces-2-4-1